As Moore's Law advanced into the 22 nm technology node, the conventional planar device has exhibited serious problems in terms of short channel effect and reliability issues, leading to serious degradation of device performance and thus the requirements of Moore's Law cannot be satisfied. A fin-type field effect transistor (FinFET), as a representative of the three-dimensional multi-gate devices (Multi-gate MOSFET, MuGFET), has been mass-produced successfully at the 22 nm technology node by virtue of advantages such as the excellent ability to suppress short channel effect, high integration density, and compatibility with the conventional CMOS process.
Among the three-dimensional multi-gate devices, a multi-bridge-channel gate-all-around nanowire field effect transistor (MBC GAA NWFET) has prominent gate-control ability, and ultra-high integration density and driving current, becoming a strong competitor beyond 22 nm technology node.
One of the key technologies for manufacturing the multi-bridge-channel gate-all-around nanowire field effect transistor is to fabricate multiple layers of ultra narrow silicon wires having a uniform and controllable position and cross-sectional shape.
The Ricky M. Y. Ng team at Hong Kong University of Science and Technology combined Bosch process in the inductively coupled plasma (ICP) etching and the sacrificial oxidation method to form multiple layers of nanowires in an up-and-down arrangement [M. Y. Ng Ricky, et al., EDL, 2009, 30(5): 520-522]. However, the position and cross-sectional shape of the nanowire formed by this method are uncontrollable due to the process fluctuations, thus causing serious fluctuations in device performance.
Sung-Young Lee et al. in South Korea's Samsung Electronics Co. successfully fabricated a multi-bridge-channel field effect transistor on a bulk silicon substrate by using SiGe as a sacrificial layer [Sung-Young Lee, et al., TED, 2003, 2(4): 253-257]. The core technology is to form a Si—SiGe superlattice structure on the bulk silicon by epitaxy, and then form multiple layers of suspended channels by removing the SiGe sacrificial layer using wet etch. However, the thickness of each film in this superlattice structure is constrained by factors such as lattice mismatch and stress release. Also, the process is relatively complicated, causing a long production cycle.